Method of making an electrically programmable, electrically eras

Details Method of making an electrically programmable, electrically eras Method of making an electrically programmable, electrically eras

1989-12-28

1991-02-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 48, 437 49, 437 50, 437 52, 437 61, 357 235, H01L 29788

Patent

active

049944037

ABSTRACT:
A pair of electrically erasable, electrically programmable memory cells are formed at a face of a semiconductor layer (10) and include respective drain regions (30a, 30b), a shared source region (28) and respective channel regions (38a, 38b). Each cell has a floating gate conductor (46a, 46b) which may be programmed by hot electron injection and erased by Fowler-Nordheim electron tunneling through respective tunneling oxide windows (40a, 40b) overlying a portion of source region (28) adjacent respective channels (38a, 38b). A wordline or control gate conductor (62) is insulatively disposed adjacent the floating gates (46a, 46b) to program or erase.

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