Process for making a semiconductor MOS transistor employing a te

Details Process for making a semiconductor MOS transistor employing a te Process for making a semiconductor MOS transistor employing a te

1995-01-23

1995-11-21

Quach, T. N.

Fishing, trapping, and vermin destroying

437 41, 437 57, 437228, 437984, H01L 21335, H01L 218238

Patent

active

054686652

ABSTRACT:
In the method of present invention, an LDD MOSFET is formed without using a side wall spacer as an ion implantation inhibiting layer. The process includes the steps of: forming a first insulating layer, a conductive layer and an auxiliary layer upon a semiconductor substrate, removing relevant portions of the auxiliary layer to form an auxiliary layer pattern such as a gate pattern on the conductive layer; depositing a temporary layer on the auxiliary layer pattern and on the exposed conductive layer, and etching it back to form a temporary layer spacer on the side wall of the auxiliary layer pattern; removing relevant portions of the conductive layer utilizing the auxiliary layer pattern and the temporary layer spacer as a mask, and forming a high concentration first dopant buried layer within the semiconductor substrate; and removing the temporary layer spacer, forming a gate electrode by etching the conductive layer utilizing the auxiliary layer pattern as a mask, and forming a low concentration second dopant buried layer within the semiconductor substrate. Applications to form CMOS devices are also disclosed.

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