Method of fabricating three-dimensional direct-write EEPROM arra

Details Method of fabricating three-dimensional direct-write EEPROM arra Method of fabricating three-dimensional direct-write EEPROM arra

1995-03-16

1995-11-21

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437203, 437915, H01L 218247

Patent

active

054686636

ABSTRACT:
A three-dimensional memory cell, suitable for electrically erasable programmable read only memories (EEPROMS), which has direct-write cell capability is disclosed. The memory cell is utilized in the fabrication of non-volatile, direct-write EEPROM arrays with high integration density. A typical EEPROM array includes a plurality of elongated shallow trenches formed in a semiconductor substrate. Multiple direct-write EEPROM cells are disposed within each elongated trench such that each EEPROM cell shares a recall gate and a program gate with another cell in the same trench. Preferably, a silicon rich dielectric (such as silicon rich oxide) disposed between each floating gate and its associated programming and recall gates. Both common source diffusion and isolated source diffusion embodiments are disclosed. Further, various fabrication methods for the direct-write EEPROM arrays presented are described.

REFERENCES:
patent: 5045490 (1991-09-01), Esquivel et al.
patent: 5135879 (1992-08-01), Richardson
patent: 5180680 (1993-01-01), Yang
patent: 5278438 (1994-01-01), Kim et al.

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