Integrated circuit design system with shared hardware accelerato

Details Integrated circuit design system with shared hardware accelerato Integrated circuit design system with shared hardware accelerato

1996-12-09

1999-08-10

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364490, 364578, 39518304, G06F 1750, G06F 9455

Patent

active

059371790

ABSTRACT:
An interactive environment is provided for integrated circuit (IC) designers to do an emulation session on a hardware accelerator 111 and then move to simulator 131, and vice versa. An aspect of the present inventive solution swaps memory state and logic storage node state (such as flip-flops and latches) between the accelerator 111 and simulator 131. A complete context switch is performed to create a time shared environment on hardware accelerator 111 so that multiple IC designers can access and use the accelerator. Multiple memory pages can be incorporated to minimize state swap time. Multiple accelerators 111 can be interconnected with a plurality of simulators 131 and a plurality of workstations 101 to allow multiple designers to do interactive operations and allows shifting back and forth between hardware emulation and software simulation.

REFERENCES:
patent: 5146460 (1992-09-01), Ackerman et al.
patent: 5329471 (1994-07-01), Swoboda et al.
Runyon, Stan, Designers Take Over Test, Electronic Engineering Times, Jul. 6, 1992, pp. 42-43.

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