Method for locating critical speed paths in integrated circuits

Details Method for locating critical speed paths in integrated circuits Method for locating critical speed paths in integrated circuits

1997-11-25

1999-08-10

Teska, Kevin J.

Boots, shoes, and leggings

364488, 364489, G06F 1700, G06F 1750

Patent

active

059368675

ABSTRACT:
A method for locating a critical speed path within a integrated digital circuit. First, the area containing the critical speed path is isolated by selectively enabling a delay of clock driver circuits in the integrated circuit. Isolating the location of the speed path consists of determining a source clock driver that clocks the source of the speed path and a destination clock driver that clocks the destination of the speed path. The possible data path that may be the speed path are then further narrowed down by examining a connection database that lists all the data paths between various circuit areas. Specifically, all the data paths that do not originate at a flip-flop clocked by the source clock driver and end at a flip-flop clocked by the destination clock driver are eliminated. Next, information from a logic simulation trace is examined. The exact time at which the error occurs is identified on the logic simulation trace. At this point, only the source flip-flops that change state during this time period can be related to the speed path. Thus all paths that do not include a changing source flip-flop are excluded from possibility. At this point, the possible suspect data paths that may be the speed path have been reduced to a very small number, possibly one.

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patent: 5583787 (1996-12-01), Underwood et al.
patent: 5608645 (1997-03-01), Spyrou

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