Nonvolatile memory with blocked redundant columns and correspond

Static information storage and retrieval – Associative memories – Ferroelectric cell

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36523003, 365200, 36523002, G11C 1140

Patent

active

053474848

ABSTRACT:
A nonvolatile memory device is described. The memory device includes a main memory array for storing data. The main memory array comprises a first block and a second block. A redundant memory array comprises a first redundant block and a second redundant block. The first redundant block comprises a first redundant column of memory cells and a second redundant column of memory cells. The second redundant block comprises a third redundant column of memory cells and a fourth redundant column of memory cells. A content addressable memory (CAM) comprises a first set of CAM cells for storing a first address of a first defective column in the main memory array and a second set of CAM cells for storing a second address of a second defective column in the main memory array. The first set of CAM cells cause the first redundant column in the first redundant block to replace the first defective column when the first defective column is in the first block. The first set of CAM cells cause the third redundant column in the second redundant block to replace the first defective column when the first defective column is in the second block. The second set of CAM cells cause the second redundant column in the first redundant block to replace the second defective column when the second defective column is in the first block. The second set of CAM cells cause the fourth redundant column in the second redundant block to replace the second defective column when the second defective column is in the second block.

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Fitzgerald et al, "Memory System With High-Performance Word Redundancy", IBM TDB, vol. 19, No. 5, Oct. 1976 pp. 1638-1639.

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