Method and system for performance monitoring time lengths of dis

Details Method and system for performance monitoring time lengths of dis Method and system for performance monitoring time lengths of dis

1995-10-02

1998-08-18

Harvey, Jack B.

Boots, shoes, and leggings

395704, 39518401, 364264, 36455101, G06F 1134

Patent

active

057970190

ABSTRACT:
A method and system for identifying inhibited interrupts in a processor system, the processor system including at least one performance monitor counter (PMC) and at least one monitor mode control register (MMCR) to configure the operations of the at least one PMC, includes initializing the at least one PMC and counting a number of cycles or occurrences with the at least one PMC that exceptions are ignored during a predetermined sampling period. In a second aspect the method and system provides for initializing at least one PMC and counting a number of cycles or occurrences with the at least one PMC that an interrupt is pending during the predetermined sampling period. The counted number of cycles/occurrences assists in identifying potential areas of improving system performance in order to reduce the counted values.

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