Static information storage and retrieval – Floating gate – Particular connection
Patent
1997-04-11
1999-02-02
Nelms, David
Static information storage and retrieval
Floating gate
Particular connection
365104, 3651851, 36518515, 36518527, G11C 1400
Patent
active
058674250
ABSTRACT:
A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A select transistor can have a source which also acts as the emitter of a lateral bipolar transistor. The lateral bipolar transistor operates as a charge injector. The charge injector provides electrons for substrate hot electron injection of electrons onto the floating gate for programming. The cell depletion/inversion region may be extended by forming a capacitor as an extension of the control gate over the substrate between the source and channel of said sense transistor.
REFERENCES:
patent: 3764396 (1973-10-01), Tarui et al.
patent: 3893151 (1975-07-01), Bosselaar et al.
patent: 4019179 (1977-04-01), Lohstroh et al.
patent: 4115914 (1978-09-01), Harari
patent: 4266283 (1981-05-01), Perlegos et al.
patent: 4417264 (1983-11-01), Angle
patent: 4577295 (1986-03-01), Eitan et al.
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5166562 (1992-11-01), Allen et al.
patent: 5216269 (1993-06-01), Middelhoek et al.
patent: 5453636 (1995-09-01), Eitan et al.
patent: 5461249 (1995-10-01), Ozawa
patent: 5463579 (1995-10-01), Shimoji
patent: 5668757 (1997-09-01), Jeng
patent: 5674767 (1997-10-01), Lee et al.
patent: 5694356 (1997-12-01), Wong et al.
Aritome, S., et al., A Reliable Bi-Polarity Write/Erase Technology in Flash EPROMs, IEDM (1990), pp. 111-114.
Chang, C., et al., Drain-Avalanche and Hole-Trapping Induced Gate Leakage in Thin-Oxide MOS Devices, IEEE Electron Device Letters, vol. 9, No. 11 (1988), pp. 588-590.
Chen, I.C., et al., Band-to-Band Tunneling Induced Substrate Hot-Electron (BBISHE) Injection: A New Programming Mechnaism for Nonvolatile Memory Devices, IEDM (1989), pp. 263-266.
Chen, J., et al., Short Channel Enhanced Degradation During Discharge of Flash EEPROM Memory Cell, IEDM (1995), pp. 331-334.
Eitan, B., et al., Substrate Hot-Electron Injection EPROM, IEEE Transactions on Electron Devices, vol. ED-31, No. 7 (1984), pp. 934-942.
Heimink, G.J., et al., High Efficiency Hot Electron injectin for EEPROM Applications Using a Buried Injector, Extended Abstracts of the 21st Conference on Solid State Devices and Materials, Tokyo (1989), pp. 133-136.
Hu, C.-Y., et al., Substrate-Current-Induced Hot Electron (SCIHE) Injection: A New Convergence Scheme for Flash Memory, IEDM (1995), pp. 283-286.
Jinbo, T., et al., A 5-V-Only 16-Mb Flash Memory with Sector Erase Mode, IEEE Journal of Solid-State Circuits, vol. 27, No. 11 (1992), pp. 1547-1554.
Johnson, W.S., A 16Kb Electrically Erasable Nonvolatile Memory, Reprinted from the IEEE ISSCC Dig. Tech. Pap., (1980), pp. 125-127.
Kazerounian, R., et al., A Single Poly EPROM for Custom CMOS Logic Applications, IEEE 1986 Custom Integrated Circuits Conference (1986), pp. 59-62.
Lezlinger, M., et al., Fowler-Nordheim Tunneling into Thermally Grown SiO.sub.2, Journal of Applied Physics, vol. 40, No. 1 (1969), pp. 278-283.
Ning, T.H., et al., Emission Probability of Hot Electrons from Silicon into Silicon Dioxide, Journal of Applied Physics, vol. 48, No. 1 (1977), pp. 286-293.
Onoda, H., et al., A Novel Cell Structure Suitable for a 3 Volt Operation, Sector Erase Flash Memory, IEDM (1992), pp. 599-602.
Parke, S.A., et al., Design for Suppression of Gate-Induced Drain Leakage in LDD MOSFET's Using a Quasi-Two-Dimensional Analytical Model, IEEE Transactions on Electron Devices, vol. 39, No. 7 (1992), pp. 1694-1703.
Sakui, K., et al., NAND Flash Memory Technololgy and Future Direction, 15th Non-Volatile Semiconductor Memory Workshop (NVSM) (1997), pp. 1-33.
Tauri, Y., et al., Invited: Electrically Reprogrammable Nonvolatile Semiconductor Memory, 5th Conference on Solid State Devices (1973), Supplement to the Journal of the Japan Society of Applied Physics, vol. 43 (1974), pp. 348-355.
Tsuji, N., et al., New Erase Scheme for DINOR Flash Memory Enhancing Erase/Write Cycling Endurance Chaacteristics, IEDM (1994), pp. 53-56.
Verwey, J.F., et al., Atmos-An-Electrically Reprogammable Read-Only Memory Device, IEEE Transactions on Electron Devices, vol. ED-21, No. 10 (1974), pp. 631-636.
Wann, H., et al., Suppressing Flash EEPROM Erase Leakage with Negative Gate Bias and LDD Erase Junction, Prod. of IEEE VLSI Technology Symposium (Japan) (1993), pp. 81-82.
Nelms David
Nguyen Hien
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