PLL circuit apparatus and phase difference detecting circuit app

Details PLL circuit apparatus and phase difference detecting circuit app PLL circuit apparatus and phase difference detecting circuit app

1993-03-30

1994-09-13

Nelli, Raymond A.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 17, 331 25, H03L 700

Patent

active

053472330

ABSTRACT:
A PLL circuit apparatus in accordance with the present invention includes a phase comparator, a delay circuit, a NOR circuit, and a loop filter. The phase comparator detects a phase difference between a reference clock signal and an internal clock signal. The delay circuit delays the reference clock signal by a delay time of an output of the phase comparator. The NOR circuit determines which pulse width is larger of a phase difference detecting signal from the phase comparator or of the delayed reference clock signal. The loop filter has its gain changed in response to an output of the NOR circuit. Thus, it is possible to shorten a synchronization pull-in time and accurately detect a deviation in synchronization. In addition, if a gain control signal is reset on the basis of logic states of a reference clock signal and an internal clock signal in accordance with rising edges and falling edges of the clock signals, it is possible to generate successive gain control signals.

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"Design of PLL-Based Cloc Generation Circuits", by Deog-Kyoon Jeong et al., IEEE Journal of Solid-State Circuits, vol. SC-22, No. 2, Apr. 1987, pp. 255-261.

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