Method and apparatus for placing an integrated circuit chip in a

Details Method and apparatus for placing an integrated circuit chip in a Method and apparatus for placing an integrated circuit chip in a

1993-04-26

1995-02-07

MacDonald, Allen R.

Boots, shoes, and leggings

364707, 364273, 3642731, 3642328, 364DIG1, 371 163, 371 66, G06F 900

Patent

active

053882652

ABSTRACT:
A method and apparatus for a chip to monitor its own activity and enter and exit a state of reduced power consumption. The present invention includes defining a predetermined state in which the chip could power down cleanly and monitoring the chip to determine when the chip is in that predetermined state. The present invention also includes a method and apparatus for putting the chip in a state of reduced power consumption state when the chip is in the predetermined state. The present invention also includes a method and apparatus for either turning off the clock generation circuitry or leaving it on during the power down state.

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"Power-on Reset" Automated Handbook 1988, published 1988, Intel Corporation, Santa Clara, pp. 10-24 to 10-25.

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