Semiconductor integrated circuit fabrication method

Details Semiconductor integrated circuit fabrication method Semiconductor integrated circuit fabrication method

1991-11-15

1995-02-07

Trans, Vincent N.

Boots, shoes, and leggings

364489, 364488, G06F 1560

Patent

active

053880544

ABSTRACT:
A semiconductor integrated circuit fabrication method for designing and fabricating semiconductor circuit elements on a semiconductor substrate for an LSI comprises the steps of: replacing standard cells with symbolic cells with an one-to-one correspondence; registering the symbolic cells in a library; drawing a circuit diagram for a semiconductor integrated circuit; describing circuit description net statements for the semiconductor integrated circuit; arranging symbolic cells and wiring among the symbolic cells to obtain a symbolic layout based on the circuit diagram and the circuit description net statements; describing a stick diagram by using the symbolic layout; forming a mask pattern by using the stick diagrams; and forming the semiconductor circuit elements and wiring among the semiconductor circuit elements on the semiconductor substrate by using the mask pattern.

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patent: 4922432 (1990-05-01), Kobayashi et al.
patent: 4967367 (1990-10-01), Piednoir
patent: 5005136 (1991-04-01), Van Berkel et al.
patent: 5031111 (1991-07-01), Chao et al.
patent: 5079717 (1992-01-01), Miwa

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