System for controlling a plurality of microprocessors

Details System for controlling a plurality of microprocessors System for controlling a plurality of microprocessors

1980-06-17

1983-12-20

Nusbaum, Mark E.

Boots, shoes, and leggings

G06F 1300, G06F 946

Patent

active

044221428

ABSTRACT:
A system for controlling a plurality of microprocessors, comprising a common memory which can be selectively switched to exclusive buses which are connected to the plurality of microprocessors, respectively, and a priority control circuit which determines the priority of the microprocessors. According to the system of the present invention, it has a common memory that is selectively connected to the buses, data is transmitted without affecting the operation of the microprocessors on the receiving side, data transfer between the microprocessors having different cycle times is carried out at speeds that are adapted to the cycle times of the individual microprocessors, and the degree of the exclusive use of the bus by the microprocessor is prevented from being reduced when the direct memory access transfer is carried out. Consequently, a system for controlling a plurality of microprocessors having an improved performance is obtained in accordance with the present invention.

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patent: 4342079 (1982-07-01), Stewart et al.
Intel Component Data Catalog, pp. 7-80 to 7-90, 1980.
M6800 Microprocessor Applications Manual, Motorola Semiconductor Products, Inc., 1975, pp. 1-1 to 1-9.

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