High speed time base counter in a field programmable gate array

Details High speed time base counter in a field programmable gate array High speed time base counter in a field programmable gate array

1993-03-12

1995-01-31

Eng, David Y.

Boots, shoes, and leggings

3649427, 364270, G06F 104

Patent

active

053865820

ABSTRACT:
A 48-bit counter comprised of twelve four-bit counter stages connected together in a chain of counter stages. Each four-bit counter stage of the chain has a clock enable input and four counter outputs and provides a standard carry output and an early carry output. The early carry output is asserted when a count of the four-bit counter stage is equal to four. The standard carry output is asserted when a count of the four-bit counter stage is equal to 0FH. The standard carry output of the one four-bit counter stage in the chain is connected to the clock enable of the next four-bit counter stage in the chain. An AND circuit is connected to the early carry output of a stage and the four counter outputs of the next stage to thereby provide a next early carry out of the next four-bit counter stage. The standard carry is generated by a pipe. The pipe length of a stage is measured from the early carry to the maximum count of the first stage.

REFERENCES:
patent: 4169994 (1979-10-01), Nordling
patent: 4553218 (1985-11-01), Genrich
patent: 4979193 (1990-12-01), Mehta
patent: 5185769 (1993-02-01), Wang

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