Data processor

Details Data processor Data processor

1992-01-10

1995-01-31

Bowler, Alyssa H.

Boots, shoes, and leggings

395375, 364DIG1, 364258, 3642599, 3642541, G06F 935

Patent

active

053865804

ABSTRACT:
A data processor which comprises: an instruction decoding unit for decoding the instruction; an operand address calculating unit having an adder and an output latch holding the added result and calculating addresses of plural memory operands, in accordance with address calculation control code outputted from the instruction decoding unit; and an instruction executing unit for executing the instruction, in accordance with the operand address outputted from the operand address calculating unit and an operation control code outputted from the instruction decoding unit; and is capable of executing the plural data operating instruction for processing plural data at high efficiency, by performing address calculation of the plural operands by the operand address calculating unit before executing the instruction by the instruction executing unit.

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patent: 5091853 (1992-02-01), Watanabe et al.
patent: 5099419 (1992-03-01), Nomura
patent: 5202967 (1993-04-01), Matsuzaki et al.
patent: 5249273 (1993-09-01), Yoshitake et al.
"Computer Architecture and Quantitative Approach," Hennessy et al., Kaufmann Publishers, Inc. 1990.
"The Approach to Multiple Instruction Execution in the GMICRO 1400 Processor", Toyohiko Yoshida, Masahito Matsuo and Shunichi Iwata Mitsubishi Electric Corp., LSI Laboratory Nov. 25, 1991 1(11).

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