Boots – shoes – and leggings
Patent
1992-07-23
1995-01-31
Bowler, Alyssa H.
Boots, shoes, and leggings
3642295, 3642301, 3642294, 364240, 364239, 3642422, 3642613, 3642615, 3642619, 3642629, 3642631, 364DIG1, 364DIG2, 395800, G06F 926, G06F 930, G06F 938, G06F 942
Patent
active
053865197
ABSTRACT:
An information processing apparatus is provided with a buffer and accompanying circuitry for retrieving instruction code at a branch target address and providing that code to an execution unit within a single clock, much more quickly than the one bus cycle which has been required previously. Not only branches, but also interrupts may be handled with this relatively simple hardware, making the invention useful in the control field, among other applications. The buffer circuitry can store a plurality of branch target addresses and/or interrupt addresses.
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"Reducing the Branch Penalty in Pipelined Processors", David J. Lilja, Computer, vol. 21, No. 7, Jul. 1988, pp. 47-55.
Katsuta Hiroshi
Nakamura Takanori
Bowler Alyssa H.
NEC Corporation
Pan Daniel H.
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