Process for making a double wafer moated signal processor

Details Process for making a double wafer moated signal processor Process for making a double wafer moated signal processor

1987-11-18

1988-11-15

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437974, 437 62, 437 86, 437 67, 437228, 437 90, 437249, 148DIG50, 148DIG85, 156645, 156648, 357 49, H01L 750, H01L 2120

Patent

active

047849703

ABSTRACT:
The method of forming a multiwafer integrated circuit for abutting electrical connection to external electronics is disclosed. The method comprises forming a plurality of grooves in the first surface of each of first and second wafers. The grooves are filled with a body of insulating material and joined along the groove surfaces thereof. In one embodiment active circuitry is formed in one of the abutting wafer surfaces. In another embodiment active circuitry is formed in a non-abutting surface of one of the wafers. Conductive leads are applied to the surface of one of the wafers to be in electrical communication with the doped regions. At least one of the conductive leads extends across at least a portion of the grooves. The wafers are trimmed in length so that the lengthwise edges of the wafers are defined by the grooves and the butt end of at least one of the conductive leads is exposed. A layer of conductive material is deposited along the lengthwise edge of the wafers in electrical communication with the exposed conductive lead to facilitate communication between the doped regions and external electronics.

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