Method of preventing fluorine-induced gate oxide degradation in

Details Method of preventing fluorine-induced gate oxide degradation in Method of preventing fluorine-induced gate oxide degradation in

1993-06-24

1994-11-15

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437200, 437190, 437192, 437193, 437247, H01L 21265

Patent

active

053648030

ABSTRACT:
A new method of fabricating a polycide gate structure is described. A gate polysilicon layer is provided overlying a gate oxide layer on the surface of a semiconductor substrate. A thin conducting diffusion barrier layer is deposited overlying the gate polysilicon layer. A layer of tungsten silicide is deposited overlying the thin conducting diffusion barrier layer wherein a reaction gas used in the deposition contains fluorine atoms and wherein the fluorine atoms are incorporated into the tungsten silicide layer. The gate polysilicon, thin conducting diffusion barrier, and tungsten silicide layers are patterned to form the polycide gate structures. The wafer is annealed to complete formation of the polycide gate structures wherein the number of fluorine atoms from the tungsten silicide layer diffusing into the gate polysilicon layer are minimized by the presence of the thin conducting diffusion barrier layer and wherein because the diffusion of the fluorine atoms is minimized, the thickness of the gate oxide layer does not increase. This prevents the device from degradation such as threshold voltage shift and saturation current decrease.

REFERENCES:
patent: 4640004 (1987-02-01), Thomas et al.
patent: 4962414 (1990-10-01), Liou et al.
Hsu et al., "Direct Evidence of Gate Oxide Thickness Increase in Tungsten Polycide Processes", IEEE Elec. Dev. Lett., vol. 12, No. 11, Nov. 1991, pp. 623-625.

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