Multi-phase PSK demodulator

Pulse or digital communications – Repeaters – Testing

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Details

375119, 329112, H04L 2716

Patent

active

046413235

ABSTRACT:
A multi-phase PSK (phase shift key) demodulator is applied to recover a binary encoded serial data from a continuous multi-phase modulated signal source. This demodulator mainly comprises a carrier detect, a hard limiter, a harmonic phase-locked clock regenerator, a digital multi-phase demodulator, a data clock divider and a reference phase synchronizer. The digital multi-phase demodulator applies the output of the harmonic phase-locked clock regenerator and N-th phase rectangular wave PSK signal to produce a demodulated binary encoded parallel data. Then the demodulated parallel data is converted into a serial data via a parallel to serial converter. The reference phase synchronizer can obtain a reference signal through the information of the leader preamble or continuous distributed sync words. Thus a retransmission is not required for phase resynchronization. The regeneration of carrier related clock signal and data demodulation are independent of data pattern if the input signal is preemphasized or conditioned.

REFERENCES:
patent: 3112448 (1963-11-01), McFarlane et al.
patent: 3815029 (1974-06-01), Wilson
patent: 3924197 (1975-12-01), Okano et al.
patent: 4233565 (1980-11-01), Chmurs
patent: 4281412 (1981-07-01), Wissel et al.

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