Method of fabricating a semiconductor device with a base region

Details Method of fabricating a semiconductor device with a base region Method of fabricating a semiconductor device with a base region

1982-06-28

1984-04-24

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 148187, H01L 2122

Patent

active

044439318

ABSTRACT:
A semiconductor device, such as a MOSFET or IGR, is fabricated with a base region having a deep portion for reducing parasitic currents. A wafer is provided having an N type layer on an appropriately doped substrate. A first oxide layer is formed on the wafer, and a refractory electrode layer is deposited on the first oxide layer. A first window is opened in the refractory electrode layer, and then silicon nitride is deposited on the wafer. A second window is opened in the silicon nitride layer, within the first window. A deep P.sup.+ base region is diffused into the wafer through the second window, and then a second oxide layer is selectively grown in the second window. The silicon nitride layer is selectively removed, thereby opening a third window, defined by the second window and the second oxide layer situated within the second window. A shallow P base region is diffused into the wafer through the third window, followed by diffusion of a shallow N.sup.+ region through the third window. The P-N junction between the N.sup.+ region and the deep P.sup.+ base region terminates at the surface of the wafer. The second oxide layer is removed, exposing the P-N junction, and the wafer is metallized, thereby implementing an electrical short across the P-N junction.

REFERENCES:
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patent: 4181542 (1980-01-01), Yoshida et al.
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patent: 4292728 (1981-10-01), Endo
patent: 4345265 (1982-08-01), Blanchard
J. P. Stengl, H. Strack, J. Tihanyi, "Power MOS Transistors For 1000 V Blocking Voltage", Technical Digest of the 1981 (IEEE) IEDM, pp. 422-425.
G. Bell & W. Ladenhauf, "SIPMOS Technology, an Example of VLSI Precision Realized With Standard LSI for Power Transistors", Siemens Forsch.-u.Entwickl.-Ber.Bd. 9(1980), No. 4, pp. 190-194.

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