Modulo-2-adder for the logic-linking of three input signals

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G06F 750

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048036498

ABSTRACT:
Three-value modulo-2-adders consist of four circuit components (SC1, SC2, SC3, SC4) and an analysis circuit (AW). The first circuit component (SC1) generates an intermediate signal corresponding to the first binary value ("1") when two of the input signals (A, B, C) each assume the other binary value ("0"). The second circuit component (SC2) generates an intermediate signal (ZS2) corresponding to the other binary value when two input signals each assume the first binary value. The intermediate value emitted from the output of the third circuit component (SC3) is binary "0" when all three input signals assume the binary value "1". The fourth circuit component (SC4) emits the binary value "1" when all the input signals have the binary value "0". The analysis circuit (AW1) switches through the first or second intermediate signal to the output when the third intermediate signal has the value binary "1" and the fourth intermediate signal has the value binary "0", otherwise the third or fourth intermediate signal is switched through in inverted form to the output.

REFERENCES:
patent: 3906211 (1975-09-01), Glaser
patent: 4569032 (1986-02-01), Lee
patent: 4601007 (1986-07-01), Uya et al.
patent: 4667303 (1987-05-01), Pfennings
Elektronik, vol. 19, Sep. 21, 1984, p. 68, VLSI Design, Feb. 1984, pp. 78-80.

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