Process for manufacturing semiconductor memory device

Fishing – trapping – and vermin destroying

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437 38, 437 60, 437160, 437203, H01L 2176, H01L 2182

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047343842

ABSTRACT:
A dynamic RAM having a memory cell constituted by a capacitor element, utilizing a trench or moat formed in a semiconductor substrate, and a MISFET. One of the electrodes of the capacitor element is connected to the MISFET constituting part of the memory cell at the side wall of the upper end of the moat for forming the capacitor element. This electrode is connected in self alignment with a semiconductor region which serves as either the source or drain of the MISFET.

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patent: 4381953 (1983-05-01), Ho et al.
patent: 4385975 (1983-05-01), Chu et al.
patent: 4569701 (1986-02-01), Oh
patent: 4582565 (1986-04-01), Kawakatsa
patent: 4593459 (1986-06-01), Poppert et al.
IEDM, 1985, pp. 710-713, "Buried Storage Electrode Cell for Magabit Drams", by M. Sakamoto et al.
IEDM, 1984, pp. 240-243, "An Isolation-Merged Vertical Capacitor Cell for Large Capacity Dram", by S. Nakajima et al.
IBM Technical Disclosure Bulletin, vol. 27, No. 11, Apr. 1985, pp. 6694-6697, "Dynamic RAM Cell with Merged Drain and Storage".
"CMOS Dynamic Random-Access Memory Cell", IBM TDB, vol. 28, No. 6, Nov. 1985, pp. 2578-2579.

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