Chip to board bus connection

Electricity: electrical systems and devices – Miscellaneous

Patent

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Details

174 685, 361406, 361403, 361397, 357 70, 357 80, H01R 909

Patent

active

045801932

ABSTRACT:
A configuration is disclosed for attaching leads (15) from several chips (1a-1d) to bus (5a) lines (9a-9m) on a printed circuit board (6). The bus (5a) includes pads (13), each directed toward one of pads (3) on the chip to be connected by arched wires (15). Lines (9a-9l) connected to each end of the board pads (13) and extend generally parallel to the chips (1a-1d) past the sections containing the pads (3). Lines (9a-9l) are displaced alternately toward and away from the chips (1a-1d) at sections containing pads (13) directed toward the chips (1a-1d) or having a part (17) taking a corresponding direction. The pads (13) alternate on opposite sides of each chip (1) to minimize the length of the leads (15) and to allow a central chip pad (3V) for carrying operating voltage (or ground) to connect to the outermost line (9m). This reduces the board space used for a bus (5a) and minimizes the length of wires (15) connecting chips (1a-1d) to a bus (5a).

REFERENCES:
patent: 3562592 (1971-02-01), Cooke et al.
patent: 3716761 (1973-02-01), Rotast
patent: 4289384 (1981-09-01), Samek
patent: 4513555 (1985-04-01), Schroeder et al.

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