Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1984-12-26
1987-02-03
Ozaki, George T.
Metal working
Method of mechanical manufacture
Assembling or joining
29576W, 29578, 29591, 148187, H01L 21443
Patent
active
046400001
ABSTRACT:
A semiconductor device is fabricated by forming a gate structure including a gate insulating film and a gate electrode film formed thereon on a surface of an element formation region defined in a surface of a semiconductor substrate by an element isolation region. Then, an impurity having a conductivity type opposite to that of the substrate is doped by using the gate structure as a mask, thereby forming first and second semiconductor regions in the element formation region. An insulating wall is formed on a side wall of the gate structure, and an insulating film is deposited on an entire surface of the resultant semiconductor substrate structure. A portion of the insulating film which corresponds to a step portion formed by surfaces of the wall and the element formation region is selectively etched to form first and second contact holes. Finally, a wiring layer is formed on the remaining insulating film so as to electrically connect to the first and second semiconductor regions through the first and second contact holes.
REFERENCES:
patent: 4330931 (1982-05-01), Liu
patent: 4356040 (1982-10-01), Fu et al.
patent: 4407851 (1983-10-01), Kurosawa et al.
patent: 4441247 (1984-04-01), Gargini et al.
patent: 4472874 (1984-09-01), Kurosawa et al.
patent: 4498223 (1985-02-01), Goldman et al.
patent: 4510670 (1985-04-01), Schwabe et al.
patent: 4541166 (1985-09-01), Yamazaki
T. Moriya et al., "A Planar Metallization Process--Its Application to Tri-Level Alumina Interconnection", International Electron Devices Meeting, Dec. 7, 1983, Wash., D.C., pp. 550-553.
Muramoto, et al., "A New Self-Aligning Contact Process for MOS LSI," IEDM Technical Digest, International Electron Devices Meeting in Washington, D.C., Dec. 4-6, 1978.
Kabushiki Kaisha Toshiba
Ozaki George T.
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