Microprocessor with operation capture facility

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395775, 395825, 395869, 395856, 3642593, 3642597, 3642641, 364265, 3642655, 364DIG1, G06F 1100

Patent

active

054559090

ABSTRACT:
The present invention provides a microprocessor with a special Operation Capture Facility (OCF) mechanism which enables "faulting" whenever there is (a) a memory access request to any one of a specified plurality of blocks of memory (b) a request to access any one of a plurality of specified I-O ports or (c) any one of a specified plurality of interrupts is activated. This OCF mechanism includes a plurality of special registers which store either (a) an I-O port address, (b) a memory address or (c) an interrupt number. Mask registers are provided which (1) mask bits in the special register, thereby providing the ability to fault on an entire block of I-O access requests or upon activation of any one of a block of interrupts and (2) indicate which type of interrupts should be faulted and to indicate whether I-O should be faulted on a byte, word or double word.

REFERENCES:
patent: 4420806 (1993-12-01), Johnson, Jr. et al.
patent: 4591982 (1986-05-01), Buonomo et al.
patent: 4709324 (1987-11-01), Kloker
patent: 4736290 (1988-04-01), McCallion
patent: 5027273 (1991-06-01), Letwin
patent: 5274791 (1993-12-01), Bracking et al.
patent: 5274826 (1993-12-01), Kardach et al.

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