Method of electrically connecting integrated circuits by edge-in

Fishing – trapping – and vermin destroying

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357 80, H01L 2184, H01L 2190

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active

050595571

ABSTRACT:
The specification discloses a package for a large number of integrated circuits. The package includes a top piece and a bottom piece formed of crystalline silicon with two levels of conductor regions formed in the top and bottom pieces. The integrated circuits are placed vertically between the top and bottom pieces and are held to the top and bottom pieces by high temperature adhesives. Solder balls which are placed on integrated circuits after the fabrication of the integrated circuits are then heated to cause the solder balls to reflow onto their respective connectors in the top and bottom pieces. TAB type conductors are then connected to the top and bottom pieces so that the integrated circuit held within this embodiment of the present invention may be connected to other circuitry.

REFERENCES:
patent: 4502098 (1985-02-01), Brown
patent: 4517738 (1985-05-01), Fukuoka et al.
Electronics, "Grooved Substrate Boosts IC Cooling", S. W. Fields, vol. 55, No. 7, 8-25-82, pp. 46-47.
Henle, R. A., "Vertical Chip Packaging," IBM Technical Disclosure Bulletin, vol 20, No. 11A, pp. 4339-4440, (4/78).

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