Overvoltage control circuitry

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 91, 327309, H02H 900

Patent

active

056548583

ABSTRACT:
Output overvoltage protection circuitry for circuits operating at low voltages (e.g., 3 v) interfacing to a higher voltage operating circuit (e.g., 5 v bus). To prevent problems with a pull-up PMOS device at the output when the bus is pulled-up to the higher voltage, a voltage node is provided in the circuit which follows the output voltage or the low supply voltage, whichever is higher, and a sub-circuit is provided to generate logic signals indicating when the bus is pulled too high. The PMOS device is then shut-down to prevent damage to the circuit.

REFERENCES:
patent: 4789917 (1988-12-01), Miller
patent: 4963766 (1990-10-01), Lundberg
patent: 4980792 (1990-12-01), Kertis et al.
patent: 5160855 (1992-11-01), Dubberpuhl
patent: 5300835 (1994-04-01), Assar et al.

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