Nonvolatile memory with reduced write time/write verify time and

Details Nonvolatile memory with reduced write time/write verify time and Nonvolatile memory with reduced write time/write verify time and

1998-06-03

2000-01-04

Tran, Andrew Q.

Static information storage and retrieval

Floating gate

Particular biasing

36518523, 36518511, 36518512, 36518513, G11C 1606

Patent

active

060117206

ABSTRACT:
An involatile memory which carries out, in a flash memory itself, verify check of the flash memory for respective bit lines, and produces an overall verify check result from a completion decision circuit to a tester. This makes it possible to solve a problem of a conventional flash memory in that the time taken by the verify check depends on the bus width of an external data bus, because it carries out the verify check by reading data from the flash memory through the external bus. Thus, the time taken by the verify check can be reduced.

REFERENCES:
patent: 5561631 (1996-10-01), Curd
patent: 5898618 (1999-04-01), Lakkapragada et al.

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