EEPROM memory programmable and erasable by Fowler-Nordheim effec

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518505, 36518511, 36518523, 36518528, 36518529, 365218, G11C 1600

Patent

active

060117176

ABSTRACT:
An EEPROM is organized in matrix form in word lines and bit lines. Storage cells are placed at the intersections of these lines. The cells include floating gate storage transistors. Groups of cells having separate bit lines but sharing a word line are created. Each group is connected to a group selection transistor. The group selection transistor selectively connects the control gates of the storage transistors to control lines, which provide potentials for enabling programming, erasure or reading of the storage transistors.

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patent: 5477499 (1995-12-01), Van Buskirk et al.
patent: 5619449 (1997-04-01), McIntyre
patent: 5627780 (1997-05-01), Malhi
patent: 5687120 (1997-11-01), Chang et al.

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