Power semiconductor component having a buffer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

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257700, 257703, 257705, 257706, H01L 23053, H01L 2312

Patent

active

056545860

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

Power semiconductor components in which semiconductor chips are connected to ceramic substrates via pressure-sintered silver powder layers are disclosed, for example, in the European patent specification having the publication number 0 242 626 B1 or in German Offenlegungsschrift DE 34 14 065 A1.
Such low-temperature connection techniques which make use, for example, of silver powder layers can also be used, in the case of power semiconductor components, for connecting ceramic substrates to metallic baseplates. However, the changing temperature on account of the power loss to be dissipated leads here to premature material fatigue and cracking precisely because of the considerably different thermal expansion coefficients, since although the layers which are customarily used in the low-temperature connection technique, such as, for example, the sintered silver powder layers, have a substantially higher thermal conductivity than, for example, connections using lead/tin-based soft solders, the connections which are obtained cannot, in contrast therewith, be plastically deformed.
The European application document having the publication number 0 139 205 discloses thermal expansion matching between an insulating layer and a metal substrate, in the case of which there is provided an adhesion layer which comprises partial layers, for example made of aluminum or copper, aluminum oxide, for example, or other oxides being increasingly added to the partial layers. However, the increased electrical resistance and the increased technical outlay are disadvantageous in this case.
The invention is based on the object, then, of specifying a power semiconductor component in which the advantage of a high thermal conductivity between the ceramic substrate and the metallic baseplate is ensured and the disadvantage of premature material fatigue and cracking is avoided.


SUMMARY OF THE INVENTION

In general terms the present invention is a power semiconductor component, in which conductor tracks are applied to one side of a ceramic substrate and are mechanically connected to at least one semiconductor chip using a first connecting layer. A stress buffer layer made of a metal from the group consisting of copper, silver or pure aluminum with an aluminum content of more than 99 percent is applied to the other side of the ceramic substrate using a second connecting layer. The buffer layer is connected to metallic baseplate via a third connecting layer. The connecting layers consist of sintered silver powder.
In an advantageous development of the present invention the stress buffer layer has a thickness of 50 to 200 .mu.m.


BRIEF DESCRIPTION OF THE DRAWING

The features of the present invention which are believed to be novel, are set forth with particularity in the appended claims. The invention, together with further objects and advantages, may best be understood by reference to the following description taken in conjunction with the accompanying drawing, in which:
The single FIGURE is a side view of a power semiconductor component according to the present invention.


DESCRIPTION OF THE PREFERRED EMBODIMENTS

The single FIGURE illustrates a side view of a power semiconductor component according to the invention. In this case, the power semiconductor component according to the invention comprises, in order, a semiconductor chip CHIP, a connecting layer 1, conductor tracks LB, a ceramic substrate SUB, a connecting layer 2, a buffer layer made of a material having a low yield point, a further connecting layer 3 and a metallic baseplate BP.
The semiconductor chip CHIP typically comprises doped silicon and the conductor tracks LB, which consist, for example, of copper, are typically applied to the ceramic substrate SUB, which consists, for example, of aluminum oxide, so-called DCB substrates (direct copper bonding substrates), which are commercially available, generally being used in this case. The. baseplate BP consists, for example, of copper. The connecting layers 2 and 3 and, generally, the connecting lay

REFERENCES:
patent: 3839660 (1974-10-01), Stryker
patent: 4651192 (1987-03-01), Matsushita et al.

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