Dual mode-increment/decrement N-bit counter register

Details Dual mode-increment/decrement N-bit counter register Dual mode-increment/decrement N-bit counter register

1986-11-05

1987-11-10

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Using particular code or particular counting sequence

377117, 377121, 377123, H03K 2352, H03K 2366

Patent

active

047062665

ABSTRACT:
A counter cell for counting either up or down by one or two includes a multiplexer section, an increment/decrement section, and a carry section. The multiplexer section is responsive to control signals and input carry signals for generating a count signal which determines the counting by one or two. The increment/decrement section is responsive to count signal and an increment strobe signal for generating an incremented output signal and a decremented output signal. The carry section is responsive to the increment/decrement section and the input carry signals for generating a carryout-by-one signal and a carryout-by-two signal. A number of these counter cells are arrayed to form an N-bit counter.

REFERENCES:
patent: 3546597 (1970-12-01), Lipke
patent: 4280190 (1981-07-01), Smith
patent: 4509183 (1985-04-01), Wright
patent: 4611337 (1986-09-01), Evans

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