Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Patent
1999-08-02
2000-05-09
Brown, Glenn W.
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
324765, G01R 3126
Patent
active
060608943
ABSTRACT:
A temporary package, a method, and a system for testing a semiconductor die having a backside electrode are provided. The temporary package includes a base for retaining the die; a conductive member for electrically contacting the backside electrode on the die; and terminal contacts in electrical communication with the conductive member. The package also includes a force applying mechanism for biasing the conductive member against the backside electrode. A conductive path between the conductive member and terminal contacts can be through a wire, or through the force applying mechanism. In an alternate embodiment the temporary package includes a base and terminal contacts formed in the configuration of a conventional semiconductor package. A cover for the base can include a metal, carbon filled elastomer, conductive foam, or conductive adhesive conductive member. The conductive member can be adapted to simultaneously contact the backside electrode on the die, and a mating contact on the base in electrical communication with the terminal contact. In addition, the conductive member can function as a heat sink for cooling the die during the test procedures.
REFERENCES:
patent: 4169642 (1979-10-01), Mouissie
patent: 4783719 (1988-11-01), Jamison et al.
patent: 5006792 (1991-04-01), Malhi et al.
patent: 5073117 (1991-12-01), Malhi et al.
patent: 5088190 (1992-02-01), Malhi et al.
patent: 5123850 (1992-06-01), Elder et al.
patent: 5302891 (1994-04-01), Wood et al.
patent: 5322446 (1994-06-01), Cearley-Cabbiness
patent: 5367253 (1994-11-01), Wood et al.
patent: 5397245 (1995-03-01), Roebuck et al.
patent: 5408190 (1995-04-01), Wood et al.
patent: 5414372 (1995-05-01), Levy
patent: 5440240 (1995-08-01), Wood et al.
patent: 5451165 (1995-09-01), Cearley-Cabbiness et al.
patent: 5483174 (1996-01-01), Hembree et al.
patent: 5495179 (1996-02-01), Wood et al.
patent: 5517125 (1996-05-01), Posedel et al.
patent: 5519332 (1996-05-01), Wood et al.
patent: 5530376 (1996-06-01), Lim et al.
patent: 5541525 (1996-07-01), Wood et al.
patent: 5543725 (1996-08-01), Lim et al.
patent: 5742169 (1998-04-01), Akram et al.
patent: 5783461 (1998-07-01), Hembree
patent: 5815000 (1998-09-01), Farnworth et al.
patent: 5834945 (1998-11-01), Akram et al.
patent: 5844418 (1998-12-01), Wood et al.
patent: 5878485 (1999-03-01), Wood et al.
patent: 5896036 (1999-04-01), Wood et al.
patent: 5929647 (1999-07-01), Akram et al.
patent: 5982185 (1999-11-01), Farnworth
Akram Salman
Farnworth Warren M.
Hembree David R.
Wark James M.
Brown Glenn W.
Gratton Stephen A.
Micro)n Technology, Inc.
LandOfFree
Temporary package, method and system for testing semiconductor d does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Temporary package, method and system for testing semiconductor d, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Temporary package, method and system for testing semiconductor d will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1068558