Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1990-07-06

1993-01-19

Popek, Joseph A.

Static information storage and retrieval

Powering

Data preservation

365185, 365149, G11C 1400

Patent

active

051811880

ABSTRACT:
A semiconductor memory device having memory cells in which a DRAM section and an EEPROM section are combined, and a transistor for transferring data between the DRAM and EEPROM sections is disclosed. The DRAM section includes a MOS transistor, and a capacitor one electrode of which is connected to the source of the MOS transistor. The EEPROM section has a floating gate transistor. The transistor for transfer is connected between the source of the MOS transistor and the source/drain of the floating gate transistor. The control gate of the floating gate transistor is connected to the source of the MOS transistor. Methods of rewriting and recalling data in the semiconductor memory device are also disclosed. The methods can be performed without shortening the life of the EEPROM section.

REFERENCES:
patent: 5063425 (1991-11-01), Yamauchi et al.
patent: 5065201 (1991-11-01), Yamauchi
patent: 5075888 (1991-12-01), Yamauchi et al.
Yamauchi et al., "A Novel NVRAM Cell Tech. for High Density Applic.," Int. Electron Devices Mtg., (1988).

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