Edge transition detection circuitry for use with test mode opera

Details Edge transition detection circuitry for use with test mode opera Edge transition detection circuitry for use with test mode opera

1996-12-21

2000-05-09

Beausoliel, Jr., Robert W.

Excavating

365201, G11C 700

Patent

active

060594500

ABSTRACT:
An integrated circuit structure and method provides for an integrated circuit device to respond to an edge transition detection (ETD) pulse in one of two ways. First, in response to the ETD pulse, the integrated circuit device exits a test mode at least temporarily every cycle of the integrated circuit device. Second, a node of the integrated circuit device is re-initialized every cycle if it is not forced by a super voltage indicative of test mode entry. Both of these responses prevent accidental entry of the integrated circuit device into the test mode. If the integrated circuit device is supposed to be in the test mode, it stays in the test mode. If, however, the integrated circuit device is not intended to be in the test mode, the ETD pulse forces the integrated circuit device out of the test mode. Subsequent entry into the test mode of the device is permitted if conditions for entry into the test mode have otherwise been met.

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patent: 5493532 (1996-02-01), McClure
patent: 5596537 (1997-01-01), Sukegawa et al.
patent: 5619453 (1997-04-01), Roohparvar et al.
patent: 5627787 (1997-05-01), McClure
patent: 5651011 (1997-07-01), Keeth
patent: 5712575 (1998-01-01), Ma et al.

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