Method of manufacturing a semiconductor memory having a memory c

Fishing – trapping – and vermin destroying

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437 60, 437919, 437228, H01L 2170, H01L 2700

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053326873

ABSTRACT:
After an insulator film has been formed on an upper layer of a capacitor constituting a memory cell, the insulator film is wet etched using a photo resist covering only a peripheral circuit portion as a mask and using a plate electrode covering the whole of a memory cell array portion as a stopper. For this reason, a step between the memory cell array portion and the peripheral circuit portion, originating from the formation of the capacitor, is moderated by the insulator film retained only in the peripheral circuit portion.

REFERENCES:
patent: 4642162 (1987-02-01), Brownell et al.
patent: 5030585 (1991-07-01), Gonzalez et al.
patent: 5077234 (1991-12-01), Scoopo et al.
patent: 5218219 (1993-06-01), Ajika et al.
patent: 5240872 (1993-08-01), Motonami et al.
Patent Abstracts of Japan JP4082263 Mar. 16, 1992.
Patent Abstracts of Japan JP3120864 Aug. 16, 1991.

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