Microprocessor having ability to carry out logical operation on

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364240, 3642591, 3642631, 364DIG1, 36492793, 3649471, 364948, 364DIG2, G06F 700

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052206700

ABSTRACT:
An instruction execution unit of a microprocessor has an ALU, a barrel shifter and a plurality of registers and these circuit blocks are coupled to an internal bus. In response to a specific instruction, the microprocessor operated to transfer output data of the plurality of circuit blocks at a time, so that logical operation of the plurality of output data is carried out on the internal bus at a high speed. The specific instruction designates which ones of the plurality of circuit blocks should transfer data to the internal bus and which one of the plurality of circuit blocks should be stored with the results of the logical operation carried out on the internal bus.

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Mead, Carver and Conway, Lynn. Introduction to VLSI Systems. chs. 5 and 6, Addison-Wesley, 1980.
DeGloria, A. "External and Internal Architecture of the P32, A 32 Bit Microprocessor". Microarchitecture of VLSI Computers. Boston, 1985.
Mano, M. Morris. Computer System Architecture, Prentice-Hall Inc. pp. 43-44, 1976.

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