1991-08-02
1993-06-15
Fleming, Michael R.
395 25, G06F 700, G06K 958
Patent
active
052206416
ABSTRACT:
A multi-layer perceptron circuit device using integrated configuration which is capable of incorporating self-learning function and which is easily extendable. The device includes: at least one synapse blocks containing: a plurality of synapses for performing weight calculation on input signals to obtain output signals, which are arranged in planar array defined by a first and a second directions; input signal lines for transmitting the input signals to the synapses, arranged along the first direction; and output signal lines for transmitting the output signal from the synapses, arranged along the second direction not identical to the first direction; at least one input neuron blocks containing a plurality of neurons to be connected with the input signal lines; and at least one output neuron blocks containing a plurality of neurons to be connected with the output signal lines.
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Furman et al., "An Analog CMOS Backward Error-Propagation LSI"First Ann. INNS Symposium, Boston, Mass., Sep. 1988, pp. 1-4.
"Design of Parallel Hardware Neural Network Systems from Custom Analog VLSI `Building Block` Chips", Eberhardt et al, IJCNN, Jun. 18-22, 1989.
Kamatani Yukio
Shima Takeshi
Davis George
Fleming Michael R.
Kabushiki Kaisha Toshiba
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