Shift register circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Particular output circuit

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Details

377 78, 377104, G11C 1928

Patent

active

050273825

ABSTRACT:
A shift register circuit comprises a series circuit comprising a plurality of first clocked gate inverters and inverters which are alternately connected in series, where a first one of the first clocked gate inverters is adapted to receive an input pulse signal, an output line connected to an output of each of the inverters for outputting an output pulse signal, and a second clocked gate inverter connected to the output of each of the inverters for outputting an output pulse signal. The first clocked gate inverters operate responsive to a first clock signal, and the second clocked gate inverters operate responsive to a second clock signal which is different from the first clock signal.

REFERENCES:
patent: 4387294 (1983-06-01), Nakamura et al.
patent: 4613773 (1986-09-01), Koike
patent: 4694197 (1987-09-01), Sprague
patent: 4951303 (1990-08-01), Larson

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