Method and apparatus for enabling the tracing of errors occuring

Details Method and apparatus for enabling the tracing of errors occuring Method and apparatus for enabling the tracing of errors occuring

1983-10-27

1984-11-06

Zache, Raulfe B.

Boots, shoes, and leggings

371 29, G06F 1110

Patent

active

044815824

ABSTRACT:
A method and apparatus for tracing errors during operation in progress in a sequence including a transfer series of binary message words between a plurality of electric circuits, which form a new message word from the obtained message word for transfer to the next circuit. The first message word in a sequence is provided with a marking word, and in each circuit the marking word is added to the new message word formed on the basis of the received message, and each message word is sensed during the transfer, the message word containing a marking word being copied into a memory. All message words provided with a given marking word are subsequently read out from the memory to determine whether the sequence of message words provided with the marking word is correct.

REFERENCES:
patent: 3810119 (1974-05-01), Zieve et al.
patent: 3995258 (1976-11-01), Barlow
patent: 4058851 (1977-11-01), Scheuneman
patent: 4166211 (1979-08-01), York et al.
patent: 4282572 (1981-08-01), Moore et al.
patent: 4347603 (1982-08-01), Jacob et al.
Oliver, "Support Processor Error Recovery Mechanism", IBM Technical Disclosure Bulletin, vol. 20, No. 4, pp. 1362-1365, Sep. 1977.
Heimsoth, "On-Line", Error and Statistics Logging in Large Data Base Systems, IBM Tech. Disclosure Bulletin, vol. 19, No. 8, pp. 2874-2876, Jan. 1977.

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