Fishing – trapping – and vermin destroying
Patent
1991-01-09
1993-06-15
Fourson, George
Fishing, trapping, and vermin destroying
437 37, 437186, 437968, 437193, H01L 21265
Patent
active
052197689
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
This invention relates to a method for fabricating an active element in semiconductor integrated circuits and particularly high speed highly integrated semiconductor integrated circuits.
TECHNICAL BACKGROUND
In the fields of semiconductor integrated circuit devices which are applied particularly as required for high speed workability, it is usual to employ ECL/CML bipolar semiconductor integrated circuit devices. In the ECL/CML circuits, when power consumption and logical amplitude are made constant, the operating speed is determined depending on the parasitic capacitance of elements and interconnections which constitute the circuit and the base resistance and the gain-bandwidth product of a transistor. Of these, for the reduction of the parasitic capacitance, it is necessary to reduce the junction capacitance between the base and the collector of the transistor which greatly contributes to the operating speed. To this end, it is effective to use polysilicon in order that a base electrode is lead out to outside an element region thereby reducing the area of the base. In addition, it is generally adopted to use a method wherein polysilicon resistors and interconnections are formed on a thick field oxide film to reduce the parasitic capacitance thereof.
On the other hand, for the reduction of the base resistance, it is necessary that an extrinsic base layer be made low in resistance and is provided as closely to the emitter as possible and also to make the emitter shallow so that an intrinsic layer beneath the emitter is reduced with respect to the resistance. In order to enhance the gain-bandwidth product, it is effective to make a shallow junction between the emitter and the base along with a thin epitaxial layer of the collector.
As a prior technique which has been proposed for the purpose of realizing these modifications, a fabrication method disclosed in Japanese Patent Application No. 62-095358 is described.
FIGS. 4(A)-(F) are, respectively, sectional views of the steps of the technique. FIG. 5(a)-(f) are, respectively, enlarged views of peripheries of base and emitter regions for illustrating the steps of FIGS. 4(C)-(F) in more detail. It will be noted that part of the films is omitted in order to avoid complication of the drawings.
FIG. 4(A) shows a state wherein after element isolation, an about 3,000 angstrom thick polysilicon is formed and oxidized at approximately 200 angstroms on the surface thereof (not shown), followed by a selective formation of 1,000-2,000 angstrom thick nitride film at portion where a base electrode and a collector electrode are to be formed. Indicated at 401 is a P.sup.- -type silicon substrate, at 402 is an N.sup.+ -type buried diffusion layer formed on the silicon substrate 401, at 403 is an N.sup.- -type epitaxial layer formed on the buried diffusion layer 402, at 404 is an element isolation oxide film formed on the silicon substrate 401 and the buried diffusion layer 402, at 406 is polysilicon formed on the epitaxial layer 403 and the element isolation oxide film 404, and at 407 is a nitride film formed on the polysilicon 406.
Next, as shown in FIG. 4(B), the polysilicon 406 is selectively oxidized to form polysilicon regions 406a, 406c and 406d. Reference numeral 409 indicates an oxide film of the polysilicon 406. Subsequently, the nitride film 407 on the collector electrode is selectively removed and phosphorus is subjected to ion implantation into the polysilicon 406d of the collector electrode and thermally treated to form an N.sup.+ -type region 405 for reduction of the resistance of the collector. Thereafter, boron is ion implanted into the base electrode polysilicon 406a, 406c through the nitride film 407 at approximately 1-5.times.10.sup.15 cm.sup.-2, followed by annealing at a temperature of approximately 900.degree. C., thereby uniformizing the concentration of the boron in the base electrode polysilicon 406a, 406c. Then, the emitter-forming region of the polysilicon oxide film 409 is selectively removed and the inner wall is oxidized to f
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Fourson George
King John J.
Manzo Edward D.
OKI Electric Industry Co., Ltd.
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