Method of laying out a semiconductor integrated circuit

Details Method of laying out a semiconductor integrated circuit Method of laying out a semiconductor integrated circuit

1997-01-27

2000-09-12

Teska, Kevin J.

3955001, 39550014, 39550006, G06F 1750

Patent

active

061189375

ABSTRACT:
A method of laying out a semiconductor integrated circuit, includes the steps of placing function cells, routing interconnections between the function cells, extracting a distance "di" between adjacent pairs of the interconnections on which signals are transmitted except for interconnections on which clock signals are transmitted, extracting a length "ai" of the interconnections which are arranged in parallel to each other at the corresponding distance "di", calculating Cp=.SIGMA..sub.i (ai/di), and re-routing the interconnections to reduce the value Cp.

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