Programmable quiesce apparatus for retry, recovery and debug

Details Programmable quiesce apparatus for retry, recovery and debug Programmable quiesce apparatus for retry, recovery and debug

1988-12-21

1990-11-27

Heckler, Thomas M.

Boots, shoes, and leggings

3642426, 36426791, 3642673, 3642656, 364262, G06F 1100

Patent

active

049741470

ABSTRACT:
An apparatus for suspending processor operation in response to an error indication wherein the processor is cycled to a known state prior to the stopping of the system clock to enable the system to be interrogated in order to determine the cause of the error indication.

REFERENCES:
patent: 4488217 (1984-12-01), Binder et al.
patent: 4495571 (1985-01-01), Staplin, Jr. et al.
patent: 4620278 (1986-10-01), Ellsworth et al.
patent: 4706190 (1987-11-01), Bomba et al.
patent: 4719569 (1988-01-01), Ludemann et al.

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