Simple process for making complementary transistors

Details Simple process for making complementary transistors Simple process for making complementary transistors

1982-12-09

1984-11-06

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 148 15, 148187, 357 42, 357 91, H01L 2122, H01L 2978, H01L 21263

Patent

active

044803753

ABSTRACT:
A very simple process is provided, with reduced processing time, for making a CMOS structure using a single polysilicon, or other refractory metal, layer which includes forming a thin gate oxide on both N and P type semiconductor layers of a common substrate, forming a gate electrode simultaneously on the N type and on the P type layers and selectively implanting an N type impurity to form N+ source and drain regions in the P type layer. The semiconductor layers are then oxidized to form substantially thicker oxide, such a silicon dioxide, adjacent to the sides of the gate electrode over the P type layer than the thickness of the oxide adjacent to the sides of the gate electrode over the N type layer. Without using a mask, a P type impurity is implanted into the N type layer to form P+ source and drain regions.

REFERENCES:
patent: 4135955 (1979-01-01), Gasner et al.
patent: 4139402 (1979-02-01), Steinmaier et al.
patent: 4277291 (1981-07-01), Cerofolino et al.
patent: 4295266 (1981-10-01), Hsu
patent: 4306916 (1981-12-01), Wollesen et al.
patent: 4382827 (1983-05-01), Romano-Moran et al.
patent: 4385947 (1983-05-01), Halfacre et al.
patent: 4391650 (1983-07-01), Pfeifer et al.

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