Semiconductor integrated circuit device and method of manufactur

Details Semiconductor integrated circuit device and method of manufactur Semiconductor integrated circuit device and method of manufactur

1989-02-01

1990-11-27

Hille, Rolf

357 23400, 357 41, 357 51, 357 54, 357 55, H01L 29780, H01L 27020, H01L 29340

Patent

active

049740601

ABSTRACT:
A dynamic RAM having memory cells each being constructed of a MISFET and a capacitor element which are formed in the shape of a pillar on the domain of a semiconductor substrate where a bit line and a word line intersect. The transfer MISFET is formed at the lower part of the pillar-shaped memory cell, while the capacitor element is formed at the upper part thereof, and a plate electrode to which the reference potential of the capacitor element is applied is isolated from the semiconductor substrate, so that 1/2 V.sub.cc can be adopted as the reference potential of the capacitor element.

REFERENCES:
patent: 4163243 (1979-07-01), Kamins et al.
patent: 4434433 (1984-02-01), Nishizawa
patent: 4630088 (1986-12-01), Ogura et al.
patent: 4712123 (1987-12-01), Miyatake et al.
patent: 4713678 (1987-12-01), Womack et al.
patent: 4737829 (1988-04-01), Morimoto et al.
patent: 4794434 (1988-12-01), Pelley, III
patent: 4833647 (1989-05-01), Maeda et al.
A Trench Transistor Cross Point D-RAM Cell, Richardson et al., IEDM Technical Digest, 1985, pp. 714-717.

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