Method and apparatus for carry-over control in arithmetic entrop

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

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341107, 341 86, H03M 726

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active

049739611

ABSTRACT:
In order to employ an output register having a finite number of stages in an arithmetic encoder, it is necessary to provide carryover control, otherwise a register having an impractically large number of stages would be required, i.e., a so-called "infinite" register. The so-called "infinite" output register is emulated by employing a counter and a finite register. To this end, a count is accumulated of sets, i.e., bytes, of consecutive prescribed logical signals of a first kind, i.e., logical 1's, being generated by an arithmetic coding register and possibly modified by a carry indication. The accumulated count is then employed to supply as an output a like number of sets including logical signals of a second kind, i.e., logical 0's, or logical signals of the first kind, i.e., logical 1's, depending on whether or not a carry would propagate through the stages of the so-called "infinite" register being emulated.

REFERENCES:
patent: 4437087 (1984-03-01), Petr
patent: 4463342 (1984-07-01), Langdon et al.
patent: 4549304 (1985-10-01), Weirich et al.
"A Multi-Purpose VLSI Chip for Adaptive Data Compression of Bilevel Images", IBM Journal of Research and Development, vol. 32, No. 6, Nov. 1988, pp. 775-795.
"Arithmetic Coding for Data Compression", Communications of the ACM, Jun. 1987, vol. 30, No. 6, pp. 520-540.

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