Patent
1995-06-07
1997-10-28
Bowler, Alyssa H.
395562, G01F 1500
Patent
active
056825455
ABSTRACT:
Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.
REFERENCES:
patent: 4296469 (1981-10-01), Gunter et al.
patent: 4354228 (1982-10-01), Moore et al.
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 4947366 (1990-08-01), Johnson
patent: 5019968 (1991-05-01), Wang et al.
patent: 5193167 (1993-03-01), Sites et al.
patent: 5202967 (1993-04-01), Matsuzaki et al.
patent: 5233694 (1993-08-01), Hotta et al.
patent: 5241633 (1993-08-01), Nishi
patent: 5317740 (1994-05-01), Sites
patent: 5394529 (1995-02-01), Brown, III et al.
National Semiconductor, "NS16032-4, NS16032-6 High Performance Microprocessors", pp. 51-112.
Horton et al., "16-Bit Microprocessor . . . Data Structures," Nachrichten Elektronik, 1981, pp. 327-330.
Kohn et al., "Session 3: Floating Point Processors, WAM 3.6: A 1,000,000 Transistor Microprocessor", ISSC 89, Wednesday, Feb. 15, 1989, pp. 53-55.
Osborn et al., Osborne 16-Bit Microprocessor Handbook, Includes 2900 Chip Slice Family, Osborne/McGraw-Hill, 1981, pp. 1-1 to 1-5; 1-24 to 1-33; 4-1 to 4-4; and 4-35 to 4-45.
Tabak, D., RISC Systems, 1990, pp. 49-71.
"i860 microprocessor internal architecture" Microprocessors And Microsystems, vol. 14, No. 12, Mar. 1990, pp. 89-96.
"Cache Organization to Maximize Fetch Bandwidth," IBM Technical Disclosure Bulletin, vol. 32, No. 2, Jul. 1989, pp. 62-64.
Akao Yasushi
Asano Yoichi
Baba Shiro
Chaki Hideaki
Fujita Shuya
Bowler Alyssa H.
Follansbee John
Hitachi , Ltd.
Hitachi Microcomputer System Ltd.
Hitachi VLSI Engineering Corp.
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