Patent
1995-12-22
1997-10-28
Kriess, Kevin A.
G06F 900
Patent
active
056825285
ABSTRACT:
The present invention provides a mechanism for initial execution of software code by a processor in a multiprocessor system. In the preferred embodiment, the multiprocessor system has registers implemented at a reset vector location in a processor. The registers are first loaded with a sequence of software code, and then a first instruction loop is implemented with that software code. The processor is then released from a reset state, and the first instruction loop is executed. This first instruction loop is capable of being executed for an indefinite length of time, and it can execute software instructions on a periodic basis. The first instruction loop is then modified into a second instruction loop. The first and second instruction loops have at least one different instruction. The processor within the system of multiple processors is thus initialized.
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patent: 5432941 (1995-07-01), Crick et al.
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Baker William E.
Fowler Daniel L.
Sonnier David P.
Williams Frank A.
Kriess Kevin A.
Tandem Computers Incorporated
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