Oscillators – With frequency adjusting means – With voltage sensitive capacitor
Patent
1989-12-19
1991-06-04
Mis, David
Oscillators
With frequency adjusting means
With voltage sensitive capacitor
331117R, 331DIG3, H03B 512
Patent
active
050217526
ABSTRACT:
A stable sampling clock signal is supplied from a VCO circuit which is able to operate in a synchronous manner with an external sync signal that does not posses good phase stability while also providing an enlarged range of variable frequency output. The VCO circuit of this invention comprises an oscillation output circuit, such as NAND or NOR circuit, having one input connected to receive an external sync signal and having its output for providing the desired oscillation or sampling clock frequency. A control voltage circuit is connected to the other input of the oscillation output circuit and to the output of the oscillation output circuit. A variable capacitance means, such as a variable capacitance diode, is included in the control voltage circuit and a control voltage is connected to the variable capacitance means to vary the capacitance of said control voltage means and stabilize the phase of said oscillation frequency output regardless of instantaneous variations in the phase of said external sync signal.
REFERENCES:
patent: 4533881 (1985-08-01), Monett
patent: 4630082 (1986-12-01), Sakai
patent: 4904962 (1990-02-01), Greene
McCarthy, W. F., et al., "Emitter-Coupled Logic, controlled Oscillator" IBM Technical Disclosure Bulletin, vol. 18, No. 3, Aug. 1975, pp. 742-743.
Carothers, Jr. W. Douglas
Mis David
Seiko Epson Corporation
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