Symmetrical variable impedance apparatus employing MOS transisto

Details Symmetrical variable impedance apparatus employing MOS transisto Symmetrical variable impedance apparatus employing MOS transisto

1989-11-22

1991-06-04

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including gain control means

307554, 307568, H03G 330

Patent

active

050217470

ABSTRACT:
A variable impedance element which is utilized to shunt a signal and control the amplitude of the signal utilizes a P-MOS and an N-MOS transistor operated in parallel. Separate control voltages are applied to each device in a direction to lower the impedance of the device with an increase in the peak to peak voltage of the input signal. Thus, by controlling each of the separate shunted transistors from separate peak detectors and according to the polarity of the signal voltage, each transistor will operate somewhat independent from the other to therefore provide accurate gain control and a symmetrical impedance variation.

REFERENCES:
patent: 3763382 (1973-10-01), Horichi et al.

Affiliated with

Also associated with

Rating

Symmetrical variable impedance apparatus employing MOS transisto does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Symmetrical variable impedance apparatus employing MOS transisto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Symmetrical variable impedance apparatus employing MOS transisto will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1029186