Process for manufacturing a semiconductor device

Details Process for manufacturing a semiconductor device Process for manufacturing a semiconductor device

1989-12-04

1991-06-04

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 56, 437 57, 437933, 437940, H01L 21266

Patent

active

050213547

ABSTRACT:
A process for the fabrication of CMOS devices is disclosed in which a selectively doped silicon layer is selectively oxidized to provide a differential thickness in the silicon and in the overlaying silicon oxide. In accordance with one embodiment, a semiconductor substrate is provided having a layer of silicon overlaying a surface of that substrate. A first area of the layer of silicon is selectively doped with N-type impurities while a second area is left undoped. The silicon is thermally oxidized to form a thermal oxide having a greater thickness over the N-type doped area than over the undoped area. Correspondingly, the silicon under the thick thermal oxide has a lesser thickness than the silicon under the thin thermal oxide. The layer of silicon is patterned to form gate electrodes and interconnects, with some of the gate electrodes formed from the silicon having N-type dopant and some of the gate electrodes formed from the silicon which is not doped N-type. Sidewall spacers are formed at the edges of the gate electrodes by anisotropically etching a sidewall spacer forming material. Because of the differential thickness of the gate electrode structures, the spacers at the edges of the N-type doped gate electrodes will be of a different thickness than are the sidewall spacers at the edges of the silicon gates not having the N-type doping. The sidewall spacers of different width are, in turn, used as a dopant mask for the formation of doped regions within the surface of the semiconductor substrate. The disclosed process allows independent doping of the polycrystalline silicon and the semiconductor substrate. A high doping concentration in the polycrystalline silicon helps to minimize the diffusing of dopant through a metal silicide layer formed on the polycrystalline silicon.

REFERENCES:
patent: 4027380 (1977-06-01), Deal
patent: 4764477 (1988-08-01), Chang
patent: 4771014 (1988-09-01), Liou

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