Method for forming a DRAM capacitor

Fishing – trapping – and vermin destroying

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437 60, 437919, H01L 218242

Patent

active

056817738

ABSTRACT:
A method for forming a DRAM cell capacitor with increased capacitance includes forming a first dielectric layer and a silicon nitride layer over a substrate. Portions of the nitride layer and the first dielectric layer are then removed. A first doped polysilicon layer is then formed over the nitride layer and filling the first trench. The first doped polysilicon layer is etched back using the nitride layer as an etchstop, thereby forming a polysilicon plug in the first trench. A second dielectric layer is formed on the nitride layer and the polysilicon layer. A second photoresist layer is patterned on the second dielectric layer and reacted with a plasma gas to form a polymer spacer. A portion of the second dielectric layer is removed using the second photoresist layer and polymer spacer as a mask, thereby forming a second trench in the second dielectric layer. A second doped polysilicon layer is formed on the second dielectric layer and in the second trench. A third dielectric layer is formed over the second doped polysilicon layer to fill the second trench. The third dielectric layer is etched back to expose the second doped polysilicon layer, forming a dielectric plug in the second trench. The second doped polysilicon layer is etched back, thereby exposing the second dielectric layer. The dielectric plug and the second dielectric layer are then removed to form a bottom electrode of the capacitor of the DRAM cell.

REFERENCES:
patent: 5545582 (1996-08-01), Roh
patent: 5552334 (1996-09-01), Tseng
patent: 5580813 (1996-12-01), Hachisuka et al.

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